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How to do synthesis without some lib?

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AlexWan

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hi all,

I am doing a design synthesis, but I haven't all library. Certainly, I have the basic lib such as smic18-typical.lib.

How to set the constrains on the unknow lib?
 

You can't do synthesis without the .DB library. This is assuming that you're using Synopsys DC. Your .LIB has to be compiled by Synopsys Library Compiler to .DB format.

But interestingly, I know some research that is going to do library-free synthesis.

good luck.
 

It depends on what is your logic and what is the missing library...

Try using your Library Compiler in the Design Compiler installation folder though you may not have a license for that...I used to convert RAM .LIB files into .DB when I didn't have Lib Compiler license, but finally it worked (without any data though)...Though it was for my test synthesis only...
 

hi giggs11
I think BuildGates and DC are same for library.

I hope to finish the synthesis recently. But I can't get the special libs for my design now. So I want to add the constrains on the blackboxs(sub-modules).

The lib for synthesis is for offering the timing delay and DRC informations. I want to know how to model those modules.

Thanks
 

read_lib smic18-typical.lib
write_lib
report_lib
try the 3 commands above in DC
 

I am not sure whether DC can read LIB???

But I think Synopsys is so clever that they will never kill their own tool - lib compiler...????

Just guess....

But I am sure Ambit (5.0) can support *.lib format.



Good luck....

Hehe.....
 

First DC accept black-box synthesis ,
second you can write a psudo lib by yourself .
if you have all .libs , converting them to .dbs is easy .
 

Thanks all,

But I need to assert my question again!
I can read all libs. I use the BuildGates for this synthesis.

I hope to know how to build the self-lib for my synthesis!

Thanks
 

If you have block-box at synthesis, you should creat the library by youself. When use synopsys tools, you can use library compile to create the library.You need to read the manual of synopsys library compile .I don't know cadence use which tools to compile library.
 

I also want to get some free lib for study. Can anyone give some link ?
 

Yes, DC can read .lib by read_lib command. But I do not think synthesis is exactly if all the librarys are prepared.
 

you must have .lib file for systhesis and layout
 

Read the .lib and write .db using DC. And reading the RTL and .db to DC to produce you netlist.
 

In your reply, it is said as the following:
"If you have block-box at synthesis, you should creat the library by youself. When use synopsys tools, you can use library compile to create the library.You need to read the manual of synopsys library compile."
How can I creat the library by youself? If I have designed a module in verilog and I want convert it to a library so that I can use it as a block-box at synthesis. How can I do it? If I want to turn to EDA tools, what tool will do? Thanks!
 

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