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How to do LVS in Virtuoso only with layout?

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aifi

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hi all...

i still wonder how to do LVS if we only have layout ? how to generate schematic from the layout?
 

LVS in virtuoso

hello aifi ..

Well if u can generate a schematic from the layout and then perform LVS .. never it will show any errors .. so the following are the steps

1) you make the layouts using candence vituso ..
2) you have to make a schematic view.
wen u start the icfb .. u can either make a new layout r new schematci .. wen u opne a new layout the tool bar will show varios metal layers ... subtrate and poly .. but wen u open a scgematic u have the options of chossing the gates r trasistors ..

so please follow soem tutorials where it shows from a small inverter ...

best of luck

suresh
 

LVS in virtuoso

you can extracte the layout and get a netlist, then , you can verify it with hspice .
 

Re: LVS in virtuoso

LVS is a kind of Sanity check , to check for the equivalency between two abstraction levels.
 

LVS in virtuoso

oh this is interesting !! Without schematic ..how can v perform LVS check n more over
LVS is layout VS schematic !!
Shiv
 

Re: LVS in virtuoso

Hi,

As the name specifies LVS - Layout versus Schematic, we need both Layout as well as schematic. With only layout if u run LVS its not worth.
 

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