How to display the frequencies and the pulse width of DUT clocks using Verilog?

[vsrpkumar]

I am writing test bench for a DUT.In that DUT there is clock
generation unit(sub block) with dividers and mutilpiers What i want is
there any method to display the frequencies and the and the pulse widths of the clocks(some are gated clocks) in prompt display .I dont want to see the simvision for calculating frequency.I am using ncverilog compiler.
kumar

 

[avimit]

Re: query in verilog

Hi, I have written
http://www.vlsiip.com/verilog/report.v
to do precisely what you want.
You may have to put some divison factor depending upon the timescale you are using, and you will get the frequency and width correct at the prompt
Let me know how it goes
Kr,
Avi
http://www.vlsiip.com