How to design a unit load?

[misha82]

hi i m going to design a cell library at 0.18u technology. i want to know how to design a unit load. i designed the balanced inverter as unit load. but the rise and fall time at the output are not same. so i changed the width of PMOS to make them equal. now time is equal but switching Vth is not 1/2 Vdd.
pls tell me the right way of designing a unit load.
thanks

 

[onlymusic16]

Re: unit load

hi i m going to design a cell library at 0.18u technology. i want to know how to design a unit load. i designed the balanced inverter as unit load. but the rise and fall time at the output are not same. so i changed the width of PMOS to make them equal. now time is equal but switching Vth is not 1/2 Vdd.
pls tell me the right way of designing a unit load.
thanks

Can you elaborate your last statement?