How to desgin the resistor and pull-up or pull-down on a two CPUs system?

[Enshuo]

Hi all,
I study a two CPU system. There is some control signals from CPU -> CPLD -> BMC. The input voltage of both CPU to CPLD and CPLD to BMC is 3.3V and the same signal, but the pull-up resistor is 4.7K from CPU to CPLD, and the pull-up resistor is 10K from CPLD to BMC. Furthermore, one resistor is pull-down at CPU0 and another is still pull-up.

So,
1. How to design the resistor and pull-up or pull-down?
2. Should active LOW be used pull-up resistor?

For example:
1. From CPU to CPLD, S0_SCP_AUTH_FAILURE_L and S1_SCP_AUTH_FAILURE_L are for secure boot function. They're pull-up 4.7K (active LOW).

2. From CPLD to BMC, S0_BMC_GPIOJ2_SCP_AUTH_FAILURE_L is pull-up 10K, and S1_BMC_GPIOZ5_SCP_AUTH_FAILURE_L is pull-down 10K.
Why is same function with different resistors and pull-types?

 

[barry]

1) What is "BMC"? Blind-mating connector?
2) There is no way we can know why something is a pull-up or pull-down without knowing the function of the signal. We know absolutely nothing about your circuit.

 

[Enshuo]

1) What is "BMC"? Blind-mating connector?

BMC is a controller (Baseboard Management Controller), and AST2500 is on this circuit.

2) There is no way we can know why something is a pull-up or pull-down without knowing the function of the signal. We know absolutely nothing about your circuit.

This GPIO signal is for secure boot authentication failure (should be a low speed). The block diagram is as below. Not sure if the external resistor is related to the internal resistor (all internal resistors of this signal are pull-down on AST2500, but an external resistor of one net is pull-up).

Thanks for your reply, Barry.

 

[KlausST]

Hi,

Generally there can be a series resistor for current limiting.
It lkmits the current accirding Ohm's law. I = V_R / R

And there can be pull_up and pull_down resistors.
Two aspects to calculate the resistance value:
* it needs to provide valid voltage levels when the signal is released. Here again Ohms law applies. Besides the input signal levels (V_IH, V_IL) input current (I_in), leakage currents (wiring, traces, connectors, dirt...), pull_up_ voltage ... need to be calculated in.
* it needs to provide the voltage levels within a given time. Here additionally the capacitance of the signals play a role (and the coupling to signals nearby). Tau = R x C may be used as raw estimation. In detail you need to calculate all in one big formula.
Also you need to consider erroneous (high voltage) signals nearby may play a role, like ESD.

Often the desingner just choose the value according his experience ... and the application.
For low power applications you may choose high ohmic resistors (but mind crow bar current in the input stages, if the signal is not very close to the rails.)
Fir high safety apllications with high noise immunity one may choose lower ohmic resitors. The useful range may be ftom some hundreds of Ohms up to Megaohms.

Klaus