[SOLVED] How to declare two bit input in UCF of verilog

[alexan_e]

What i told you here https://www.edaboard.com/threads/195409/#post818846 still stands, change either the ucf file or your code because these two do not match.
Then try again and tell us what error messages you are getting, also post the changed text

Alex

 

[rberek]

Moonightingale

You declare outputs one through eight in your code, but you never assign them values. Instead you assign "result" the values of one thru eight depending on your case statement. I'm not sure this code would even synthesize correctly. It looks very badly wrong.

I'll bet the synthesis tool is just removing those outputs altogheter, since they are useless. So by the time the PAR tool tries to apply the UCF to your design, the outputs are long gone.

You really need to take another look at that code, and you always need to look at the synthesis logs to see what the tool did to your code.

r.b.

 

[moonnightingale]

Sir kindly kindly write code for me
I am desparate to operate this question now
I have also changed my code

module alu2bit(aluout,result,a,b,select,zero,one,two,three,four,five,six,seven,eight,nine);
output [3:0] aluout; // the result
output [3:0]result;
input [1:0] a,b; // input a and b
input [1:0] select;
reg [3:0] aluout,result;
output zero,one,two,three,four,five,six,seven,eight,nine;
always@(a or b)
begin
case (select)
2'b00:aluout=a+b; // For addition of two bits
2'b01:aluout=a-b; // For addition of two bits
2'b10:aluout=a*b; // For multiplication of two bits
endcase
if (aluout==4'd0) zero<=1'b0; // no LED will glow
else if (aluout==4'd1) one<=1'b1;
else if (aluout==4'd2) two<=1'b1;
else if (aluout==4'd3) three<=1'b1;
else if (aluout==4'd4) four<=1'b1;
else if (aluout==4'd5) five<=1'b1;
else if (aluout==4'd6) six<=1'b1;
else if (aluout==4'd7) seven<=1'b1;
else if (aluout==4'd8) eight<=1'b1;
else result=zero;
end
endmodule

it is also not working

 

[alexan_e]

when you assign 1 to a led you should set all the others to 0, now you only light one led and you let all the others in the state they were.
Maybe use one 8 bit output (instead of one,two,three..) and do
10000000
01000000
00100000
where each bit is one led.

Alex

 

[mrflibble]

Is this a homework assignment or something? If it is not, but just something you chose to try and learn verilog, might I suggest trying something simpler. When it works, you can always add stuff.

Regardless, why do you maintain on having for example "aluout" as a module output, when 1) you don't declare it in the ucf, and 2) you don't seem to be needing it as an output anyways since you only use it internally. Dont panic. Think logically. What are the inputs you really need as inputs. What are the outputs you really need to go out of the module. Only those should show in the

module alu2bit( fixit );

declaration.

as far as I got your explanation you only need "a", "b", "sel" as inputs (all these as 2-bit inputs), and "one" ... "eight" as the outputs (all as 1-bit outputs to the leds). So maybe fix that first.

 

[rberek]

Sorry, no thanks.

I'm busy at work right now writing RTL and I have several projects of my own at home.

Besides, you'll never learn anything if you don't do it yourself.

Did you look at the synthesis logs?

r.b.