xzcv
Newbie level 5
I have a question
I want to design a delta sigma with error feedback architecture that first stage is 2order noise sahping 1bit and two stage is 3order noise shaping 4bit.
If input bit are 23bits , how to design internal path bits,for example,how many but should be set at integrator input and out ?
I want to design a delta sigma with error feedback architecture that first stage is 2order noise sahping 1bit and two stage is 3order noise shaping 4bit.
If input bit are 23bits , how to design internal path bits,for example,how many but should be set at integrator input and out ?