surisingh
Member level 1
Hi,
Can anyone tell me how to convert a real value (b/w +1.0 and -1.0) in VHDL into std_logic_vector(13 downto 0) and again revert back this std_logic_vector into real value.
I tried to write a function to convert these things,but it didn't work out for me.
Take an example of -0.000136114. I want to convert this real value into 14 bit vector and again convert this vector into real so that i have to get the final real value which should be equal to -0.000136114.
Suresh
Can anyone tell me how to convert a real value (b/w +1.0 and -1.0) in VHDL into std_logic_vector(13 downto 0) and again revert back this std_logic_vector into real value.
I tried to write a function to convert these things,but it didn't work out for me.
Take an example of -0.000136114. I want to convert this real value into 14 bit vector and again convert this vector into real so that i have to get the final real value which should be equal to -0.000136114.
Suresh