How to construct a Divide by 5 FSM. Please explain the solution.

[sam33r]

Q: Draw the state diagram for a circuit that outputs a "1" if the aggregate serial
binary input is divisible by 5. For instance, if the input stream is 1, 0, 1, we
output a "1" (since 101 is 5). If we then get a "0", the aggregate total is 10, so
we output another "1" (and so on).


Ans:
http://grumpytom.com/Interview_Questions/state_machine_2.jpg


Can someone please explain me how did we constructed the above FSM?

 

[yadavvlsi]

You can refer to any of these books:
1. Fundamentals of Logic Design By Charles Roth
2. Digital Design: Principles And Practices, By Wakerly John F.

 

[sam33r]

I am not getting the logic behind this question. I know how to construct an less complex FSM