how to build a general instance in IC5?

[flyinspace]

spectreverilog simulation cdslib/sample library

Hi,
I am confused about how to build an universal instance in IC5. Say, an invertor, whose w/l=5/1, but when I need another invertor whose w/l=7/1,then I have to build another new one. So it is very unconvenient! Then, who can tell me how to build an universal invertor by using NMOS and PMOS in analog library(analoglib in ic5)?
Thanks
best regards

 

[ramberwang]

Hi,guy search CDSDOC for "Design Variables and Simulation Files for Socket Simulation" and find [pPar] function there is also a pic example to how to

good luck

 

[tlihu]

You may refer to the way that parameters are passed in the pmos4/noms4 instance in analogLib.

 

[ramberwang]

Sorry i miss the point. pPar difined for the layout pcell
do like this
1 open pmos nmos schematic in the l m w filed define
[ @lp:%0.13u] [@m:%:1 ] [@wp:%:0.4u] then save
2 CIW-TOOLS-CDF ---> default kfactor to length MEtric to u M
3 deifine you inverter schematic based pmos and nmos

4 CIW-tools-CDF-->edit
browse (lib inverterl) change effictive to BASE
add component para lp wn ( all yes, unit LENGTHMETRIC)
m (all yes no unit)
save
5 using this inverter and all lp ln wp wn m could pass parameter

 

[flyinspace]

Hi,ramberwang,
Thank you very much!
I do not find the schematic of nmos and pmos in the analogLib. Then how to deal with it? If I need to biuld two schematics based on nmos and pmos first? And then do what you have told me?
BestRegard

 

[ramberwang]

1 check your library path manager and be sure you have the library
BASIC or sample or you could find the composer tutorial from the path IC50/tools/dfII/samples/tutorials/composer/ and get the
restart to run. it will install the composer tutorial for you. Be careful
to backup your .cdsinit and cds.lib file . this install will also change your cdsinit and cds.lib file. after install you could find the sample AND basic file.
2 another way to get these library is to add library path to the path manager
IC50/tools/dfII/etc/cdslib/basic BASIC library
IC50/tools/dfII/etc/cdslib/sheets/US_8ths sheets size library
IC50/tools/dfII/etc/cdslib/artist/analogLib another library
IC50/tools/dfII/samples/cdslib/sample sample library

You are always welcome

 

[mas_serg]

I have similar question.
Does anybody now how to pass Instance parameter to functional view during SpectreVerilog mixed mode simulation? For example invertor delay time for different types of a structure. It is not convenient to use different cells for different invertors. During analog simulation it is not problem: just add to symbol CDS parameter "par_name" and write in pPar("par_name") in subcircuit component parameter field. But how to do it for mixed mode simulation? It creates analog and digital netlists separated and how to pass instance parameters to digital netlist I don't now.
Any ideas?