How to balance the scan chains?

[monika]

How to balance the scan chains?

 

[santhosh007]

why balance scan chains

Scan chain balance is nothing but having an equal number of scan cells in all the scan chains. simply: total no of flops/number of scan chains.
no of scan chains depends on the availability of IO's and tester.. so forth.
Many times may not be possible to keep equal no of flops in the scan chain due to the logic partition or external IPs...

 

[vlsi_eda_guy]

Re: Scan chain balance

If you have multiple clocks in the testmode, then to have a balance chains you have to make sure that you allow clock mixing in the scan chains. At the boundary where the clocks changes a lockup latch should be inserted.


-cheers
Anand

 

[monika]

Scan chain balance

Thanks for the replay.

one more point here is choosing the optimal scan-cahin length involves an inherent tradeoff
Tradeoff is number of scan pins Vs tester time
for ex : A chip with 1000 FFs and one scan chain would required 1000 clock cycle to load a scan chain, however using scan chain would place 100 FF in each scan chain and cost only 100 clock cycles to load in a chip state (chain is balanced)
Different between 2 architecture here is that signal scan chain required only 1 SI, 1 SO and 1 SE where as 10 scan chain required 10 SI, 10 SO and 1 SE (3 pin Vs 21 Pins)