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How much does the input_delay need to be set for scan_en signal in STA?

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binbin1994

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does it need to be de-skew for scan_en and test_clock?

how much the input_delay need to be set for scan_en signal in STA? assume 10MHz test cycle and 100MHz(max frequency) ATE.

thanks!
 

ATPG timing problem

just make sure there isn't any time violation.
 

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