samuel_john
Member level 1
load on signal
hi
if we consider the internal logic inside an FPGA....normally how many inputs can be driven by a FF..and on what factor does it depends.
when does register duplication happens...
thanks
hi
if we consider the internal logic inside an FPGA....normally how many inputs can be driven by a FF..and on what factor does it depends.
when does register duplication happens...
thanks