How does VHDL automate digital design

[SanjayKKK]

I am a beginner to vhdl..
I know vhdl is a hardware description language used for designing digital circuits..
It has 'C' like constructs..

What I don understand where does vhdl fit in the digital automation process?
What does it do? What are its inputs and outputs?

First of all What is a hardware description language??

From a bit of reserch on the internet I found it to be a "computer
languages for formal description of digital electronic circuits" and stuff like structural , behavioual..


suppose we have a logic say F = AB + C
To implement this I need two inputs, an AND logic and OR logic...
Now, what does vhdl do to design the logic..
Does it give a logic digram as its output??
If so its going to be dead simple.. looking at it anyone could say that..

plz help me get an insight about it or suggest me a book where I could get answers for these?

 

[guitarguy12387]

I know vhdl is a hardware description language used for designing digital circuits..

I think you know this.... but i'm not convinced that you KNOW this haha!

VHDL (or any other HDL) is just that! It is a way to describe logic circuits in code so that you can understand. Also, it provides a method of abstraction and hierarchical designing.

VHDL doesn't do anything you can't do in a schematic. However, it makes design more manageable and provides more flexibility. The only way for you to truly understand and appreciate this notion is to start learning the language and code some examples. Design a state machine in VHDL. Compare that to how you would draw a schematic for the same state machine... then you will begin to appreciate it!

 

[SanjayKKK]

Thanks guitarguy...