How do I code convergent rounding with variable scaling in VHDL?

[kel8157]

Assume the following C code, what's the most efficient method do I use in VHDL, assuming timing is more important than area?

Thank you in advance.

Assume 8 bit Din, 3 bit scl (scaling factor);

K = 7;

Temp = (Din << (K-scl) + (1<< (K-1));
Dout = (Temp >> K) & ((K&0xFF) ? 0xFF, 0xFE);