High Side Current Sensing

[geobabu]

HI All,
I need to implement a high side shut resistor based current sensing with a Differential ADC. Here the line consists of around 12VDC @ current varies from 1 to 10A. Eventhough the drop stands within the Differential i/p voltage limit(+/- 2.048V), its common mode voltage is higher than what is allowed.
Also I am aware that, there are some dedicated ICs and Opamp based instrumentation amplifiers are available, I am just trying to implement with same ADC & less components (as shown in the attached image.) . Simulation everything seems good, but before implementing I am seeking some advice from you. Whether this is a good practice for implementation. Hoping for your valuable suggestions.
Thanks in advance
Regards,
Geo

 

[FvM]

"tolerance variations are excluded". Put-in some reasonable resistor tolerances into the calculation to answer the question about "good practice" yourself.

Besides the tolerance problem, using a 18 bit ADC to get about 9 bit resolution isn't really satisfying I think.

 

[geobabu]

"tolerance variations are excluded". Put-in some reasonable resistor tolerances into the calculation to answer the question about "good practice" yourself.

Yes 1% tolerance was applied. Its seems to be fine. Anyway in practical implementation some more changes can be expected, that's why I mentioned that.

Besides the tolerance problem, using a 18 bit ADC to get about 9 bit resolution isn't really satisfying I think.

Ofcourse its a fact !. Its really not need to have a 18bit ADC here. But I have some of them . (I can't use the uC's internal ADC here). Even though its a 18bit ADC , I am planning to configure them for 12bit mode with 240sps. In 18bits it gives 3.75sps. Also thought that later it can be configured for higher voltages & current measurement with some good accuracy.

Regards,
Geo

 

[FvM]

Yes 1% tolerance was applied.

Unllikely, otherwise you'd notice that common mode error is larger than measured signal.