Help With Altera FPGA + PLL

[Sink0]

Hi, i just started with FPGA and i developed a UART with TX and RX FIFO. Now i want to work with bigger baudrates and for that i am going to need to use PLL to multiply my clock (50Mhz). The multiplied clock is just going to be used to sample the RX for now. I could not figure out how to make use of the PLL. I have read on Altera's website about the ALTPLL block but could not understand how to work with it. Can some one help me? My FPGA is a Cyclone II EP2C8 with 208 pins.

Thank you!

 

[ckaa]

You just need to instantiate a PLL using MegaWizard. In Quartus under the "Tools" tab you'll find the MegaWizard PlugIn manager. Open that and it's a wizard that will guide you on creating your PLL (ALTPLL is located in the I/O folder under installed plug-ins in the megawizard plug-in manager). I hope this is what you were looking for.

 

[FvM]

You feed a crystal clock to the PLL and get one or more different clocks out of it. Basically, the achievable PLL frequencies must be represented by an integer multiplier and divisor. The Quartus MegaWizard can help you to evaluate the feasible PLL frequencies.

 

[Sink0]

Thank you just got it. What for are the pins areset and locked. Areset i imagin it is for reseting the block. What about locked? Should i use them or should i be ok if i leave the open?

Thank you!

 

[ckaa]

The top right corner of the Megawizard plug-in manager has a button called Documentation. You'll find a PLL user's manual here which will explain in detail all the ports of the PLL module. Your PLL will work if you don't use the 'areset' and 'locked' ports. The 'locked' is asserted when your PLL achieves lock on the specified output frequency and 'areset' resets the PLL asynchronously. You could disable these ports in the 'Inputs/Lock' tab of the megawizard window if you have no use for them in your logic.

 

[Sink0]

Thank you .. thad helped a lot. Actualy it is working! hehe

Cya