ramesh441
Advanced Member level 4
I did my coding in verilog and synthesized with DC (synopsys).
My library is synopsys 90nm (generic)
I want to generate layout for it.
When I am trying to use Encounter it is giving an error.
Saying SOCSYC-*****
Can anyone say what I have to do ot o resolve it.
Thanking you,
RamesH
My library is synopsys 90nm (generic)
I want to generate layout for it.
When I am trying to use Encounter it is giving an error.
Saying SOCSYC-*****
Can anyone say what I have to do ot o resolve it.
Thanking you,
RamesH