UFK
Member level 3
Verilog-debugging
Hiii
Iv been trying to run this particular piece of code for a .dat file. can someone please help me debug? it keeps giving me the following error
Module <test> has no port.
I made a .dat file as follows:
@002
11111111 01010101
00000000 10101010
@006
1111zzzz 00001111
Please help me with it.
Hiii
Iv been trying to run this particular piece of code for a .dat file. can someone please help me debug? it keeps giving me the following error
Module <test> has no port.
I made a .dat file as follows:
@002
11111111 01010101
00000000 10101010
@006
1111zzzz 00001111
Please help me with it.