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[HELP] How to prepare *.db or *.lib for analog block ..

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bravobravo

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[HELP] How to prepare *.db or *.lib for analog block ..when I run DC...

if I have simple verilog file for analog block (list only pin definition)
and a file with pin capacitance ....

Please ..
 

If the analog module is a IP, the IP provider should provide it ( and of course other files ).

If it is an in-house design, ask the analog designer or the library owner for it.

Basically, like any other libs, the analog macro library is extracted by SPICE simulation result and described it in matrics. And then, converted to the .lib format.
After you get the .lib file, you could compile it in the synopsys library compiler to get a .db file.
 

it is said pathmill of synopsys can generate .lib, but i dont know wether it can do with analog module
 

You can hand-made one easily as only port list is requited. Follow some other .lib for the syntax. You can also compile it in dc_shell, it would flag error on no library complier license but can be ignored for port-list only .db .
 

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