help! how to avoid LVS report unmatch when use dummy MOSFETS

[saiaoying]

dummy lvs

hello!

In order to let the current mirror circuit match much better, i place some dummy MOSFETS in the layout, and they are not drawed in the schematic, so when i have a LVS check, it always show me that the dummy MOSFETS is unmatch.

how to deal with this problem?

 

[safwatonline]

lvs dummy

draw in schematic !!

 

[Hughes]

They can be ignored by a special rule. In diva, it is called prune rule and is defined by "pruneDevice".
But if the dummy devices have connections with the circuit, including them in schematic is a better choice.

 

[tsinghua]

Re: help! how to avoid LVS report unmatch when use dummy MOS

Shorting all ports of these MOSFET's to GND. Properly written LVS rules will ignore these dummy devices.

 

[road_0506]

Re: help! how to avoid LVS report unmatch when use dummy MOS

short all terminals to VDD if PMOS and to VSS if NMOS...
this will solve the problem...

 

[wenadinho]

Re: help! how to avoid LVS report unmatch when use dummy MOS

do you get something like "unmatched gate length for parallel devices in the layout"? Then for my case, I will just ignore it, because normally the LVS will show that "the netlist are matched logically"

 

[evilguy]

Re: help! how to avoid LVS report unmatch when use dummy MOS

what lvs you use? if using tanner lvs there is a rule that will ignore shorted devices in lvs setting.