didibabawu
Member level 5
Hi,
I meet a problem of convergence when I use veriloga to model the SH circuit.
I first use veriloga to build the model of capacitor, ideal switch and ideal opamp, but when I do the simulation with spectre, It tell me no convergence, how can I do with this problem?
thx!!
I meet a problem of convergence when I use veriloga to model the SH circuit.
I first use veriloga to build the model of capacitor, ideal switch and ideal opamp, but when I do the simulation with spectre, It tell me no convergence, how can I do with this problem?
thx!!