Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Fresher looking for an opportunity.

Status
Not open for further replies.

Basu_Gouda

Member level 1
Joined
Nov 15, 2010
Messages
34
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Location
Bangalore
Activity points
1,520
Hi
I have done my masters in VLSI design and embedded systems and also underwent training in ASIC Verification and i am looking out for an opportunity. please guide me through. My mail id is basava.lg@gmail.com

Thanks in advance
 

Hi
Presently as I am looking out for an opportunity anything is fine for me.

---------- Post added at 20:23 ---------- Previous post was at 20:15 ----------

Hi
Presently as i am looking out for an opportunity anything is fine for me.
My skill sets are:

OPERATING SYSTEM: WINDOWS, LINUX .
SOFTWARE LANGUAGES: C, C++.
ASSEMBLY LANGUAGES: 8085,8086,8051.
Hardware Description Language: VHDl, Verilog.
HVL: System Verilog
ABV: PSL
Methodologies: VMM

ENGINEERING APPLICATIONS: VDSP++ 5.0 (DSP Analog Devices), XILINX 8.2i, ModelSim 6.5, MatLab.



I am good in Verilog RTL design, Verification knowledge includes constructing transactors using system verilog and good in coverage driven verification. Capable in doing data integrity and assertion based verification can build the environment from the specification.
 

Attachments

  • basavan_new.doc
    45 KB · Views: 97
Last edited:

Yes I did visit the forum and even forwarded my resume still no reply for the mail
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top