frequecy divider of digital signals

[jas2005]

Hi

I'm trying to build a simple model of frequency divider in simulink.
I used counter but now I need a block which can change the logic value to opposite on every rising edge.
So it should keep the 1 or 0 as long as edge occurs then make invertion.

Is a block like this in simulink?

 

[byteptr]

you can make edge detector by combinational logic and one delay-cell.
Look this

https://www.allaboutcircuits.com/vol_4/chpt_10/5.html

BR

 

[jas2005]

it's not a problem with detecting egdes (there is even such block in simulink) and delaying signal after that.
My question is: can I find a described in first post, block in Simulink?
If not, how to build it?

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The scheme is in the picture. I used counting both edges in order to obtain odd div number.