Reychard
Newbie level 4
- Joined
- Oct 9, 2010
- Messages
- 6
- Helped
- 0
- Reputation
- 0
- Reaction score
- 0
- Trophy points
- 1,281
- Location
- McMurdo Station
- Activity points
- 1,324
Hi everyone,
I'm using an ADC to convert signals from a resistive humidity sensor. I'm trying to get it to work with my Spartan-3 FPGA board such that the conversion process is always outputting values and not just once at a time. I'm outputting the 8-bit value on the 8 LEDs.
Now, what I have so far works only when I flick the switch on and off continuously so that the LEDs show the 8bit value as I vary the humidity.
The code I have for the continuous display of values is very slow and it updates very slow. The following is the code I have;
The datasheet specifies that Read strobe must occur 8 clock periods (8/fCLK) after assertion of interrupt to guarantee reset of INTR.
The clock I'm using is 50Mhz. Can anyone please help me out here?
I'm using an ADC to convert signals from a resistive humidity sensor. I'm trying to get it to work with my Spartan-3 FPGA board such that the conversion process is always outputting values and not just once at a time. I'm outputting the 8-bit value on the 8 LEDs.
Now, what I have so far works only when I flick the switch on and off continuously so that the LEDs show the 8bit value as I vary the humidity.
The code I have for the continuous display of values is very slow and it updates very slow. The following is the code I have;
Code:
START_FSM : PROCESS (CURR_STATE, INTR)
BEGIN
READ_DATA <= '0';
WR <= '0';
CASE CURR_STATE IS
WHEN STARTUP =>
WR <= '0';
READ_DATA <= '0';
NEXT_STATE <= CONVERT;
WHEN CONVERT =>
IF (INTR = '0' AND STREAM = '1') THEN
NEXT_STATE <= WAIT500;
ELSIF (INTR = '0' AND STREAM = '0') THEN
NEXT_STATE <= READ1;
ELSE
NEXT_STATE <= CONVERT;
END IF;
WR <= '1';
READ_DATA <= '0';
WHEN WAIT500 =>
IF (COUNTER_WAIT = 5000) THEN
NEXT_STATE <= READ1;
ELSE
NEXT_STATE <= WAIT500;
END IF;
COUNTER_WAIT <= COUNTER_WAIT + 1;
WHEN READ1 =>
NEXT_STATE <= CONVERT;
WR <= '1';
READ_DATA <= '1';
WHEN OTHERS =>
NEXT_STATE <= STARTUP;
END CASE;
END PROCESS;
The datasheet specifies that Read strobe must occur 8 clock periods (8/fCLK) after assertion of interrupt to guarantee reset of INTR.
The clock I'm using is 50Mhz. Can anyone please help me out here?