orangelogic
Junior Member level 1
I am trying to design a FFT block in verilog and I am stuck with the floating-point adder unit. Can anybody help me the rounding logic which involves the usage of sticky bit.
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check the output of each stage of ur fft as with stages the decimal point tends to shift and at one point ur results may overflow....orangelogic said:I am trying to design a FFT block in verilog and I am stuck with the floating-point adder unit. Can anybody help me the rounding logic which involves the usage of sticky bit.