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ESD Question: output/driver protection

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vivace

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output driver

(Also posted in the analog ic design forum, sorry for the spam)

There is a general configuration of esd protection.

My question is: with Rs protecting the output driver, the output frequency is also limited by it. Can I just remove the Rs resistor for BW purpose?

I've read several documents and some of them just protect the output driver with the double diode as primary esd protection (no Rs). On the other hand, during an esd event, especially the CDM event, the node voltage at the pad (Vpad) could be greater than 10V. It seems that even using stacked transistors won't protect the output driver adequately.

Please feel free to tell me your opinions.

Thanks in advance.
 

output drivers esd

May be , but normally Rs should be there as this will limit the current in-rush at the time of ESD and hence improve the life of protecting diode.
 

esd protection diodes on outputs

Without knowing the details (technology, robustness of the drivers, size of the drivers, ESD protection concept for the core, ESD requirement...) it is difficult to answer this querstion. The resistor is placed there for a reason so you can expect that simply removing it will have effect on the ESD performance of the circuit.

However, one thing is clear: if you want to remove the resistance for improved BW and still want good ESD protection then you just need to investigate other protection approaches.

For sure there are various options like
- Ensuring that the core/power protection clamp has a low trigger voltage and low voltage drop during ESD stress.
- Reduce the bus resistance between the IO and the core clamp as much as possible
- Include a low-cap primary protection clamp between the diodes and the drivers. This may even lead to a further improvement of the bandwidth if you can remove the silicide blocking of the driver.
- ...

Let me know if you need support to design the solution for this problem.

ES
 
protection video driver output

Thanks, dipnirvana and ESDSolutions.

ESDSolutions:

The protection I used is pretty much the same as the attached image. Double diodes for primary and secondary ESD and RC clamp for the power clamp. ESD requirement is the industry std.

I didn't use silicide blocking for the output driver. They are just regular I/O transistors.

The ON resistance of the diodes and clamps is optimized to low value (~1ohm) and the bus resistance is also small.

Now back to the former question, Rs is still necessary? Do I have to use other primary ESD instead of the diodes to keep the cap low?

Thanks,
vivace
 

why do we need silicide block for esd

The ESd DIODES are place to protect the unwanted current to the core so the ESD resisitance and the diode are placed since at the time of designing the CDM is one which we will be taking care .
 

output + esd protect

The structure there is and IO pad - so it is not only input or output.

For input protection the primary and secondary diodes with Rin are used.
For output in genral the primary diodes are ok.
The Rs resistor I believe is very small. and pretty much will protect the output driver against extra current during ESD pulse. That reistor ensures (well in my opinion) that most of the current is dissipated by primary diodes.
The Rs could be replaced by silicide block on the drain of the output FETs. You can put there minimal silicide blck area so the speed and RDSon will not be affected but it ill provide required protection. On the other hand you might run into issue that silicide block requires (sometimes) larger gate size.

The 10V on the pad would turn on the diodes and also the parasitic diode on the output driver. Depending on the output fet size you might not even need the primary protection....

ESD power clamp - depending on the architecture of the clamp you still have to be able to sink a lot of current fast. So in generla minimum size for the MOS based clamp is 400um minimum. And thoe clamp should be spread arround the die.

To improve BW the diodes play much bigger role then Rs due to the capacitance. And it is hard to use something else. You can use diode, diode connected FETs, ggNMOS but the area to dissipate pulse is still large and you will have hard time to avoid it.
So the question is - are you willing to risk and use your own custom ESD and not the proven one?
 

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