neo_anderson
Newbie level 5
ncvlog
Hi all,
I was trying to simulate a verilog-AMS, and make a symbol, but i occured error. (using version: ius_v5.7_qsr1)
---------------------------
ncvlog(64): 05.70-s001: (c) Copyright 1995-2006 Cadence Design Systems, Inc.
ncvlog: *E,AMSN64: Verilog-AMS not supported in 64-bit mode.
-----------------------------------
I guess the tool is automatically invoking 64bit, where do i locate this file, is there a Environment variable to be set?
My CDS_AUTO_64BITS is set to NONE
Thanks
Hi all,
I was trying to simulate a verilog-AMS, and make a symbol, but i occured error. (using version: ius_v5.7_qsr1)
---------------------------
ncvlog(64): 05.70-s001: (c) Copyright 1995-2006 Cadence Design Systems, Inc.
ncvlog: *E,AMSN64: Verilog-AMS not supported in 64-bit mode.
-----------------------------------
I guess the tool is automatically invoking 64bit, where do i locate this file, is there a Environment variable to be set?
My CDS_AUTO_64BITS is set to NONE
Thanks