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ERC error "Floating psub is not allowed"

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Symark

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Hello. I'm doing layout in Cadence Virtuoso and there's an error in ERC.
When designing and layout the cascode amplifier using the tsmc 65nm process,
there is an error "Floating psub is not allowed" in the stack nmos.
How can I get remove this error?
(I used nmos_rf.)
EDA질문.png
 

Connect bulk to ground or use triple well device.
Now you have a short between net64 and VSS.
 

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