DSB-SC modulation on an fpga

[Christian Chetcuti]

I am trying to simulate dsb-sc modulation on an fpga. The carrier and modulating sinusoidal signals are generated inside the FPGA through the use of digital compiler v4.0

A multiplier that calculates the product of the carrier and modulating
signal was designed using Multiplier core.

However, the output from the multiplier was nothing near that expected, signal seemed full of noise. Note: sine waves are generated perfectly as i checked each of them on the oscilloscope

 

[ads-ee]

Once again you don't specify the format of the data. Do you even know what format the data is supposed to be in?

I'm assuming the multiplier uses 2's complement data and you are probably supplying the data you sent to your DAC which is offset binary.

I think you need to review data formats for binary number representations.

 

[Christian Chetcuti]

Hi ads-ee, i am supplying unsigned data to the multiplier, i've defined my inputs as unsigned in the core settings. I've checked the datasheet for the multiplier core but there's nowhere written what the output format of the multiplier is. I am supplying two 12 bit inputs and generating a 12 bit output...

Maybe should the input bit size be smaller in order to obtain a proper 12 bit output?

 

[ads-ee]

Hi ads-ee, i am supplying unsigned data to the multiplier, i've defined my inputs as unsigned in the core settings. I've checked the datasheet for the multiplier core but there's nowhere written what the output format of the multiplier is.

I may be wrong, but I don't think you should be multiplying offset binary sinusoids (unsigned) you should be using 2's complement so you get both positive and negative excursions around 0 (i.e. a sinusoidal signal). So the multiplier should be a signed multiplier.

Have you ever played around with signals like this in something like MATLAB or Scilab to see what happens to the data when you use offset binary as opposed to signed (2's complement) data? I really think you should do some experiments like that and see what happens, it's a lot easier to do than having to write a bunch of RTL and generate and FPGA image to download and look on a scope.

I am supplying two 12 bit inputs and generating a 12 bit output...
Maybe should the input bit size be smaller in order to obtain a proper 12 bit output?

As long as you are using the upper 12-bits (means you are scaling the data by 1/4096)

 

[Christian Chetcuti]

Didnt understand the last part.. Could you please explain further? I changed inputs to unsigned since they werent displayed correctly on the oscilloscope.. Do u think i should leave them signed and then change the multiplier output to unsigned?

I may be wrong, but I don't think you should be multiplying offset binary sinusoids (unsigned) you should be using 2's complement so you get both positive and negative excursions around 0 (i.e. a sinusoidal signal). So the multiplier should be a signed multiplier.

Have you ever played around with signals like this in something like MATLAB or Scilab to see what happens to the data when you use offset binary as opposed to signed (2's complement) data? I really think you should do some experiments like that and see what happens, it's a lot easier to do than having to write a bunch of RTL and generate and FPGA image to download and look on a scope.



As long as you are using the upper 12-bits (means you are scaling the data by 1/4096)

 

[ads-ee]

You were supposed to add the DC offset to the output of the multiplier when you sent the data to the DAC input (i.e. convert the 2's complement data to offset binary). See your other thread post #8 by mrfibble where it's mentioned you add 2048 the DDS data.

As I don't work with these types of signals I could be off base. I mostly work with packet based data, networking, error correction, and control, I don't work on much up conversion and SDR stuff. Regardless I would likely use something like MATLAB/Scilab/Numpy/etc to model the algorithm before writing any code.

 

[Christian Chetcuti]

Yes, i added 2048 to to the output of the sine waves and observed a correct output on the oscilloscope, but now i need to use this data for multiplication before passing it to the to the dac

 

[ads-ee]

The point is I don't think you should be adding the 2048 at all until you send something to the DAC as the DAC is the only part of your design that REQUIRES offset binary data.

If I was designing this, I would have a separate module that has the 2's complement to offset binary conversion and I would call it DAC_IF.v, which I would use to send 2's complement data to the DAC.