DRC errors

[omar97]

Hello everyone,
I have nearly 400000 DRC errors on VIA7.
I am using technology TSMC 65nm with runset M9_6X2Z
actually, i can't understand why this errors appeared for me.
Can someone help me to understand why this errors appered?

this is a complete description of this error:

0: Layer: VIA7 (57) Type: USER_GUIDE.VIA7
Net type: Ground; Route type: Std Cell Pin Connection
Type Summary : USER_GUIDE.VIA7 : Via layers with forbidden datatypes. -- Command: ./ICVLN65S_9M_6X2Z.26_2a:8008:copy
Obj Info : Net: VSS

thanks alot.

 

[dick_freebird]

The kit name makes me think it's for a 6LM process and
maybe via7 is not valid for the PDK sub-flow variables
as set.

Like right now for another foundry I've got a device library
with MIM caps but it won't even let me place them due to
some callback logic saying I don't have the flow with MIM
option selected.

Fancy is as fancy does, especially when it doesn't.

 

[ThisIsNotSam]

The process is M9_6X2Z, which means it has 9 metals, the first six are of the type X and the next two are of the type Z. Most likely you are designing with the wrong stack. The most popular stack for TSMC 65 is 6X1Z1U, just so you know, as it is used in MPWs quite often.

In any case, you gotta make sure your design matches your DRC/LVS deck configuration. Do not take the decks for granted, open the rules file and inspect them in a text editor to make sure it matches the stack that you think it should be. Do the same with the techlef you are using in Innovus or the .tf file in Virtuoso.

 

[omar97]

The process is M9_6X2Z, which means it has 9 metals, the first six are of the type X and the next two are of the type Z. Most likely you are designing with the wrong stack. The most popular stack for TSMC 65 is 6X1Z1U, just so you know, as it is used in MPWs quite often.

In any case, you gotta make sure your design matches your DRC/LVS deck configuration. Do not take the decks for granted, open the rules file and inspect them in a text editor to make sure it matches the stack that you think it should be. Do the same with the techlef you are using in Innovus or the .tf file in Virtuoso.

Hello sir,
Great thanks for your attention.
Actually, i have only a few years of experience of working.
But i opened the technology file and found that the technology name is TSMC N65 SP9M6x2z TCBN65.
So, i decided to choose runset ICVLN65S_9M_6X2Z for ICV or CLN65S_9M_6X2Z for calibre.
Is that a true choice?

 

[ThisIsNotSam]

Yes! But you gotta make sure you design following the same rules. Check your Innovus/Virtuoso settings too!