MAAASD
Member level 4
Hello all,
I'm preparing for my graduation project which is (a Verilog implementation of the all digital phase locked loop )
and asking if you can recommend me any good books or references about this topic, and any tutorials on how to make the chip layout
on cadence and calibre . (i really don't have any experience on how to get the chip layout ready for fabrication )
Any help would be much appreciated,
Thanks in advance!
I'm preparing for my graduation project which is (a Verilog implementation of the all digital phase locked loop )
and asking if you can recommend me any good books or references about this topic, and any tutorials on how to make the chip layout
on cadence and calibre . (i really don't have any experience on how to get the chip layout ready for fabrication )
Any help would be much appreciated,
Thanks in advance!
