double clock feed to synchronous state machine

[p.satya arikanth]

double clocking asynchronous

hi
i am srikanth can u plz suggest an idea or releated topics for this question

In what cases do you need to double clock a signal before presenting it to a synchronous state machine?



srikanth

 

[seanwu]

double clocking

Asynchoronous signal does.

 

[p.satya arikanth]

synchronous state machine

hi ,


double clocking can be feed for asynchronous design while domain crossing to avoid metastability but i want when to feed double clock to an FSM .....


srikanth

Added after 3 minutes:


hi ,


double clocking can be feed for asynchronous design while domain crossing to avoid metastability but i want when to feed double clock to an FSM .....


srikanth

 

[anjali]

clock feed

one example is, feeding an async reset/set to a FF ( no matter it is in an FSM or not).

in general async signals are double clocked to avoid recovery violations and in multi clock domain.

 

[arunragavan]

need of double clocking in synchronous machines

what excatly is recovery violation.. and why do u double clock asyn ckts..having multiple clocks in asyn ckts always results in metastability resolution..

its also excess power consumption

any sugessions?

with regards,
arun

 

[anjali]

double clocking metastability

recovery limit specifies how much time must elapse after a control signal, like clear signal, toggles its active state, before there is an active clk edge. here the control signal means any async input to the FF.