Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

does synopsys dft_drc simulate SE=1?

Status
Not open for further replies.

jakejake

Newbie level 4
Joined
Jul 12, 2007
Messages
5
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,302
Hi, my question is: does synopsys dft compiler simulate SE=1 when performing dft_drc? When doing dft drc debugging, I see SE=X in design vision. Is this supposed to happen? Thanks.
 

Hi, my question is: does synopsys dft compiler simulate SE=1 when performing dft_drc? When doing dft drc debugging, I see SE=X in design vision. Is this supposed to happen? Thanks.

I have almost the same question, in some ports i see X/-, ~01/B,~01/B or X/-,X/B,X/B, could someone tell me what that means???, Thanks.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top