giggs11
Member level 3
hi guys,
appreciate the help. just one final query....during functional simulation, does VCS operate similar to Formal verification...?
Would VCS require test vectors...? because i know that in Formal verification, the functionality is verified through comparison between HDL design and gate level netlist.
Thanks.
appreciate the help. just one final query....during functional simulation, does VCS operate similar to Formal verification...?
Would VCS require test vectors...? because i know that in Formal verification, the functionality is verified through comparison between HDL design and gate level netlist.
Thanks.