zhiling0229
Member level 1
Hi Everyone,
I'm at the dead-end here and don't know what to do, really need your help.
I'm having a layout design in such a way that two transistors are sharing the same diffussion. (Refer to the picture below) Where the first transistor drain is connected to the second transistor gate
The problem is the two transistors are not the same length where the second transistor is 45 times larger in length. Since both of the transistors are not the same length I presume that they should not have same Vt
I have a few questions:
1. How will the different Vt affect the speed performance of the transistor?
2. Will the different Vt cause some effect on the depletion region as both of them are sharing the same p well?
As based on the silicon I observe that some of the device suffer from clock run-through issue.
Please let me know if I got my facts right as well as any ideas or pointers for the questions will be a great help.
I'm at the dead-end here and don't know what to do, really need your help.
I'm having a layout design in such a way that two transistors are sharing the same diffussion. (Refer to the picture below) Where the first transistor drain is connected to the second transistor gate
The problem is the two transistors are not the same length where the second transistor is 45 times larger in length. Since both of the transistors are not the same length I presume that they should not have same Vt
I have a few questions:
1. How will the different Vt affect the speed performance of the transistor?
2. Will the different Vt cause some effect on the depletion region as both of them are sharing the same p well?
As based on the silicon I observe that some of the device suffer from clock run-through issue.
Please let me know if I got my facts right as well as any ideas or pointers for the questions will be a great help.
