Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

did anyone know how to draw layout of passive capacitor?

Status
Not open for further replies.

fareast

Newbie level 6
Newbie level 6
Joined
Nov 19, 2005
Messages
12
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,402
i need to draw a layout of a couple of passive capacitors.can anyone teach me how to draw it?my capacitors value is about 100pF to 500pF.i have another option to draw using parasitic capacitance but i don't know how to calculate w/l.is there any notes or tutorial that i can refer to?fyi,it's hard to get a better book in vlsi design in my country.:cry:
 

Check out journal for IPI and MIM capacitor..i think it's better.

If u wanted to used parasitic it's influenced by Cox where it's = tox/εox.

So it will be very small thus u need large layout for value such as 100p
 

mix siganl design rule will tell you how to draw the mim cap, which is generally used to implement big caps.
 

art of analog layout

is a good reference for layout...
 

MIM cap or the poly-to-poly cap are your choice, but you need to confirm if this process can support that.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top