DFT strategy in semicustom flow

[p_shinde]

hello,


DFT strategy where does this comes into picture in a semicustom flow??????????????


is this a frontend job or backend ??????


thanks, reply soon.

Prasad

 

[spauls]

dft io site:www.edaboard.com

DFT starts only agter syntheisis.

 

[p_shinde]

rtl changes from dft point of view

means at what stage of semi custom flow???????? after fp, placement routing??????

as till now i havent seen DFT in semi custom flow so is it done by backend enggs or not????????


thanks,
Prasad

 

[praveen_venigalla]

Re: DFT strategy

Hi,

DFT is done after synthesis and before P & R. It is a Digital Front end process.

 

[Thinkie]

DFT strategy

DFT is front-end responsiblity.

Sometime back-end guys do scan restitching... but not always

 

[yln2k2]

Re: DFT strategy

Hi ,

Two aspects as per as DFT

1) FE - are you giving all your code is testable ? ( some of your code may not be testble like edge deterctors ...., so one should have awareness of DFT .....)
Desinger need to add scanin,scanout,scanclk to the module ports and as a part of RTL one should see if you have multile clks how you can give a single clk in DFT ?
I mentioned very basic .... there are so many aspects of DFT from FE perspective ....

2) BE : from Backend you do
1) scan insertion ( convert flops to scan flops)
2) scan reordering ( for timing point of view) ...

Above topis are with respect to SCAN
other aspects of DFT are

1) BSD - FE -RTL ( boundary scan design in RTL
2) ATPG - FE - ( test patterns)
3) JTAG - FE - inser tap controller
4) IDDQ - BE - These to test ideal current in presilicon and postsilicon
5) IO characterization
6) MBIST/CPUBIST ( for memory testability)
7) Redenadant/Fusing cells

Above topics are to my knowledge as people are keep on moving to deep submicron technology they are keep on adding DFT techniques ....

Thanks & Regards
yln

 

[rajesh9999]

Re: DFT strategy

Intrestingly some new DFT tools now offer scan chain insertion at the rtl level itself. Anyone tried this

 

[kbulusu]

Re: DFT strategy

most folks still dont prefer to change their RTL. At the netlist level , magma,synopsys, mentor can do the DFT (scan insertion , DFT repair) etc.

 

[chandhramohan]

Re: DFT strategy

Hi ,
The exact dft logic insertion happens only at the netlist level . But the RTL can be coded DFT friendly which will reduce the effort after DFT insertion .There are some basic checks during scan inserion which can be handled well in RTL level itself .Like your reset ,clrz control & internal generated clock control .

I think Spy glass tool does these checks at the RTL level itself.

Regards
Chandramohan

 

[kbulusu]

Re: DFT strategy

Spyglass also synthesizes the RTL and does the checks. It does very basic synthesis and is not a full fledged synthesis engine....the benefit of spyglass is you can check the scan readiness of your design./RTL in very short time since it does only basic synthesis and no optimization...