seanshihf
Newbie level 3
system on a chip devices
Design of System on a Chip
Devices & Components
Edited by
Ricardo Reis
Universidade Federal do Rio Grande do Sul,
Brasil
and
Jochen A.G. Jess
Eindhoven University of Technology,
The Netherlands
Contents
Designs of System on a Chip. Introduction 7
R. Reis; J. A. G. Jess
BJT Modeling with VBIC 19
C.C. McAndrew
A MOS Transistor Model for Mixed Analog-digital Circuit Design and
Simulation 49
M. Bucher; C. Lallement; F. Krummenacher, C. Enz
Efficient Statistical Modeling for Circuit Simulation 97
C.C. McAndrew
Retargetable Application-driven Analog-digital Block Design 123
J. E. Franca
Robust Low Voltage Power Analog VLSI Design 143
T. B. Tarim; C.H. Lin; M. Ismail
Ultralow-Voltage Memory Circuits 189
K. Itoh
Low-Voltage Low-Power High-Speed I/O Buffers 233
R. Leung
Microelectronics Toward 2010 245
T. Yanagawa, S. Bampi, G. Wirth
Index of Authors 265
6
Design of System on a Chip
Devices & Components
Edited by
Ricardo Reis
Universidade Federal do Rio Grande do Sul,
Brasil
and
Jochen A.G. Jess
Eindhoven University of Technology,
The Netherlands
Contents
Designs of System on a Chip. Introduction 7
R. Reis; J. A. G. Jess
BJT Modeling with VBIC 19
C.C. McAndrew
A MOS Transistor Model for Mixed Analog-digital Circuit Design and
Simulation 49
M. Bucher; C. Lallement; F. Krummenacher, C. Enz
Efficient Statistical Modeling for Circuit Simulation 97
C.C. McAndrew
Retargetable Application-driven Analog-digital Block Design 123
J. E. Franca
Robust Low Voltage Power Analog VLSI Design 143
T. B. Tarim; C.H. Lin; M. Ismail
Ultralow-Voltage Memory Circuits 189
K. Itoh
Low-Voltage Low-Power High-Speed I/O Buffers 233
R. Leung
Microelectronics Toward 2010 245
T. Yanagawa, S. Bampi, G. Wirth
Index of Authors 265
6
