Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Demultiplexer in T-1 TDM_PCM system (24-channel)

Status
Not open for further replies.

semiconductor

Full Member level 4
Joined
Apr 4, 2003
Messages
236
Helped
4
Reputation
8
Reaction score
0
Trophy points
1,296
Activity points
2,735
My lecturer in Digital communication subject has assigned us a project:
design Digital Logic circuit to implement the following task: demultiplex the PCM bit sequence in T-1 (24-channel) system (and also synchronize).

I'm take deep steps into this project but I only understand in terms of theory. I don't know how to design circuitry of this Demultoplexer (esp. frame and multifram alignment in synchronization).

In the 24-channel Format, each frame contains 24 slots and 1 bit for frame alignment. Every 6 slots, in the 8-bit code, 7 bits for information coding and 1 bit for signaling --> That's all I know about this system

Can some one tell me more and raise some ideas for me to design the circuitry of the DEMUX!
If you have done the same project as mine or you have got the circuitry already, can you share it with me?

Thank you before hand!
 

Hello,

Take a look at Dallas Semiconductor web site, which produces integrated circuits for this purpose. I was doing a digital telephony project a couple of years ago with PCM circuits(E1-30 channels because I live in Europe) and I have used microcontrollers together with some PCM circuits from Dallas. I forgot, nowdays you can find them under the Maxim brand. In any case the PCM integrated circuits synhronize themselves on the PCM stream and you can have an interrupt towards your MCU every time an data character inside the appropriate PCM channel is received and you can choose between 30 of them. You can configure the PCM demultiplexer in many ways because it has internal registers with an 8-bit bus as an control interface. You can also transmitt an byte which will be inserted in a PCM stream.
 

to everyboy here:

I have to design the syncronization circuitry for the TDM_PCM 24 channel (used in North America) and the demultiplexer.

I do not where to begin. I lacks of documents on 24-channel system. I really need your helps. Can someone recommend me some useful documents (plz upload them here) and links.

I don't know how to syncronize? I mean frame alignment and multiframe alignment (If there are some circuits on this problem - syncronization of TDM_PCM demultiplexer, please introduce them here)

Thank you beforehand!

semiconductor!
 

library books

There are some books put out by the US authorities on this subject. Telecommunications Transmission Engineering by AT&T and also Transmission Systems for Communications by the same group.

You might also try the US government regulations, CFR 47 series is their radio and wire standards.
 

go to ***.maxim-ic.com web page and have a look at product tree and find related Dallas semiconductor's chips. Then read it, read it again and finally start coding.

*** -> www
 


Please note that E1 is significantly different from T1 when it concerns physical level signalling . The synchronization fro E1 is done based on information on timeslot 0 which is fully dedicated to physical level intersignalling , while on T1 there is no such dedication . The E1 and T1 as well send pattern on synchronization layers , those patterns will be repeated - thus it gives possiblity to match against those and make synchronization alignment .
The picture becomes little bit more complicacted if there is CRC check added on physical layer .
 

Plz, someone help me................
I can not do anything.............
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top