Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

DDR2 dq IO design for academics project

Status
Not open for further replies.
N

NageswaraRao

Newbie level 1
Joined
Jan 3, 2011
Messages
1
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,285
Hi,

I started working on DDR2 IO's, i am very new to this.

Can some one provide some information on how DDR2 Dq design is done.

Any information regarding this Design will be help ful.

Thanks,
Nagesh.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top