DC link capacitor ripple current

[cupoftea]

Hi,
We are doing a 500W SMPS, 115vac in, 28vout, 500wout, Trxformer 30:6
We have a 200kHz PFC feeding a DC link , which is drained by a Full Bidge at 250kHz. (125kHz single fet)

The Full Bridge has 1.8A of AC RMS input ripple current.
The PFC has 3A of AC RMS output ripple current.

We have a circuit to "push" the period of the Full Bridge "forward" by 500ns at a time, (every 30 seconds) so that overall, there is less total ripple current seen in the DC link capacitance.
(As opposed to synching PFC and FB to really reduce ripple)

What percentage reduction from maximum do you think we may achieve by this?

 

[Easy peasy]

If you are going to do this, then set the PFC to 100kHz, and set the down converter to 200kHz with locked clocks, ( or 120 / 240 kHz if you prefer )

that way when the PFC fet turns off - hopefully the diode current will overlap with a fet being on, on the power stage, at every turn off.

This requires a minimum of added control to achieve ripple reduction in the storage caps, and once done - you don't need to think about it....