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data_source port added by DFT compiler

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sam536

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All,

Does any one come across below scenario using DFT compiler.

When i try to insert_dft in my design, DFT compiler is inserting few extra ports in the netlist like data_source and data_sourcea, test_in5 and etc.

i specified the TestData type port in protocol as shown below. still its showing in preview_dft report, data sources are going to add in the netlist.
set_dft_signal -view existing_dft -type TestData -port RESET

Can any one point me out , how to get rid of these extra ports in the netlist written by DFT compiler.


Regards,  
  Sam
 

put this as well in the script....

set_autofix_configuration -type reset -test_data res
set_autofix_configuration -type set -test_data U1/Z
set_autofix_configuration -type clock -test_data clk


-cheers
vlsi_eda_guy
 

I have these commands in script, but signals data_source, data_sourcea, data_sourceb rests in design.
 

Hi Sam,

Why are you defining Reset ad type testData. We used to define it as -type reset. Can you try this.
 

In my script:
Code:
set_dft_signal -view spec -type ScanDataOut -port t_so
set_dft_signal -view spec -type ScanDataIn -port t_si
set_dft_signal -view spec -type ScanEnable -port t_se
set_dft_signal -view spec -type TestMode -port t_m 
set_dft_signal -view existing_dft -type ScanClock -port CLK -timing {50 100}
set_dft_signal -view spec -type Reset -port t_rst -active_state 0

set_autofix_configuration -type reset -method mux -control_signal t_m
set_autofix_configuration -type clock -control_signal t_m

in the issue extra pins (data_source, data_sourcea, data_sourceb) are created.
 

I solved this problem. For ports t_m, CLK, t_rst need create 2 dft signals: view existing_dft and view spec. View spec is used for command set_autofix_configuration.
Code:
set_dft_signal -view spec -type ScanDataOut -port t_so
set_dft_signal -view spec -type ScanDataIn -port t_si
set_dft_signal -view spec -type ScanEnable -port t_se
set_dft_signal -view existing_dft -type TestMode -port t_m -active_state 1
set_dft_signal -view existing_dft -type ScanMasterClock -port CLK -timing {50 100}
set_dft_signal -view existing_dft -type Reset -port t_rst -active_state 0

set_dft_signal -view spec -type TestMode -port t_m
set_dft_signal -view spec -type TestData -port CLK
set_dft_signal -view spec -type TestData -port t_rst

set_autofix_configuration -type clock -method mux -control_signal t_m -test_data CLK
set_autofix_configuration -type reset -method mux -control_signal t_m -test_data t_rst
set_autofix_configuration -type set -method mux -control_signal t_m -test_data t_rst
 

Hi poluekt,

can you please elaborate it. what happens if we define the signals both as spec and existing_dft.

when do we use -type Testdata? Can you plz clear these
 

Signals with type TestData are used for DFT DRC violations autufixing, they have view spec.
On the other hand we define main DFT signals (which are used also as TestData) with view existing_dft and main type (ScanClock, Reset). Two signals for same port with view spec define prohibited.
 

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