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Current mode control modelling

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tynnor

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Hello,
I am new on this forum. I have seen very interesting content here. I am a French student in electronic engineering in an apprenticeship program, so I also work in a company. And this year, my project is to design a 48V->350V 1kW Phase Shift Full Bridge converter. It's a fascinating project but this king of powerful converter is not the speciality here, so I would need your help for some details.
My converter is already fully designed and now I try to design the control loop. I would like to choose a current mode control to avoid the heavy capacitors, transformer flux imbalance and to allow an inherent current limiting. The only disadvantage I can see in this kind of control is the modelling part and I would need your help for this.
I read the Ridley's thesis about current mode control, I understand very well how it works, I have successfully applied it to buck converters but now I am stuck to do the same with my PSFB. I would like to get a model :
\[ \frac{i_{out}}{v_c} \]

With this, I will be able to use all the theory we know to design the outer voltage loop. I cannot find any model for a PSFB in current mode control so it seems I have to develop it by myself. For this, I have taken the Ridley's model :
CMC_Ridley.png


In a first time, in order to design the control loop, I don't care about the feedforward terms, and I think it's the right things to do when I read the magazine from Ridley (Designers's Series - Part V - Current Mode control Modeling). So :
\[ G_{ic} = \frac{i_L}{v_c} = \frac{F_m G_{id}(p)}{1 + F_m R_i H_e(p)G_{id}(p)} \]

Now I use Matlab to plot this, for PSFB with the characteristics in the Matlab script below. You can see the bode and step responses for this transfer function with the attached images.

Code:
close all

Vin = 600;
fs = 100000;
Ts = 1/fs;
Vout = 360;
Rload = 70;
Ri = 4.2/200;
C = 5e-6;
L = 315e-6;
Llk = 52e-6; %inductance de fuite
N=1; %turns ratio Ns/Np
Rd = 4*N^2 * Llk / Ts;
D = Vout/(N*Vin);


Gid = N*Vin/Rload * tf([Rload*C 1], [L*C (L/Rload + Rd*C)  (Rload+Rd)/Rload]) 


%slope compensation
Sf = Ri * Vout/L;
Sn = Ri * (Vin*N - Vout)/L;
Se = Sf;


%modulator
Fm = 1 /((Sn + Se)*Ts)


%High frequency behavior
mc = 1 + Se/Sn;
w_n = pi/Ts;
Qp  = 1 / (pi*(mc*(1-D) - 0.5))
Hf = tf(1, [(1/w_n)^2 (1/(w_n*Qp)) 1])


Gic = feedback(Gid*Fm, Ri*Hf);
% step(Gic);
bode(Gic);

grid on
grid minor
h = gcr;
setoptions(h, 'FreqUnits','Hz');


closed_loop_bode.jpg


The problem is that I totally don't know what it should look like, neither if it's right or wrong and I don't have any power converter simulator here to check the bode response.
stepresponse.jpg


Is my approach good for solve this problem ? What do you think about these results ? What are your favourite power converter software simulators ?

Thank you for your help :)
 

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  • closed_loop_current.jpg
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  • step_response.jpg
    step_response.jpg
    20.5 KB · Views: 205

PSFB is a Buck derived topology, (almost) so the equation for vout(s)/verr(s) on page 227 of “Switch mode power supplies” by Christophe Basso would be relevant.
As you know, you need to refer various things across the transformer as necessary to feed the expression.
Though if there is a significant extra primary inductor added to keep ZVS at light load, then the pg227 expression may need some adjustment.
Rayridleyengineering as you know do the AP300 frequency analyser which you can use to check your calculations.
I take it isolation is definitely required here. Remember if you use opto isolation then that puts significant tolerance into the bode plots.
I am sure you know simple stuff like “keep the crossover frequency as low as possible, because fast feedback loops are more noise sensitive”

(as an aside, Many would cheat here and first boost up (with a boost converter or dual boost converter) to 300V say, and then use an LLC to get to your 350V at 1Kw. LLC does have the advantage of less leakage induced ringing on the output diodes, so lower voltage output diodes can be used. The LLC also has less reverse recovery related fet failure modes than the PSFB).
 
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    tynnor

    Points: 1
    quick and detailed answer
Hello,
Thank you for your answer.
Unfortunately this kind of tool is very unaffordable for my company.
We have heavy temperature constraint, I will use an isolated op amp from Analog to do this.

Usually, how do the power converter designers design their converter ? Is the simulation the new tool for this or are the hardware tests and measurements still the common way ?
 

Transient response tests are always needed, even if youve done the bode plots.
Eg switch from 10% load to full load and vice versa and see if it goes unstable, or overshoots/undershoots too much.

Also do from 0% load to 100% load and vice versa.

Remember , if you go into light load, and your error amplifier output rails low....then with that railed error amplifier output, bode plots etc dont really mean very much.

I wouldnt mind betting that different switch mode professors, will come up with different expressions for getting the bode plots for a PSFB....especially a PSFB with a significant primary side inductor added in.
 

Hi,

First, I don't know much, and haven't read the Ridley material you have used, even though his stuff is very good, so I might not understand your questions and level of knowledge.
Not 100% sure it applies to your topology/set-up, I'd read that for stability:
- When gain passes through 0 dB, phase should be a positive number.
- When phase passes through 0°, gain should be a negative number.
- 'A control loop is unstable if the loop has unity gain when the phase passes through zero.'

These points are from slup340, 'Switch-mode power converter compensation made easy'.


To a layman, the gain and phase shapes are okay-looking, but that is hardly scientific.
 

Hi,
My problem is not to make it stable, I know what I will have to do to design my compensator. But to do this, I need a model, from measurements, or from simulation. But we don't have the means to buy a power converters simulator to get the bodes neither a frequency analyzer.
Therefore, I try to get a mathematical model of this, but I am really in pain for this... Usually, what is the process to design the PSFB compensation ?
 

    d123

    Points: 2
    Helpful Answer Positive Rating
Did you use an off-the-shelf PSFB driver IC.?....eg like the ti.com one?...if so, they go through the model in the datasheet and app notes.

This contains loop modelling for PSFB...

equation 105, page 17

...
So page 17 (equ 105) gives you the control to output transfer function for PSFB…so now, as you know, you must multiply this by your particular compensator transfer function, to give you the open loop transfer function round the whole loop....then you can plot the bodes from this.

Rather than multiplying the two transfer functions, you can in fact plot both out separately...but plot the logarithms...then at each frequency point, you can simply add the log values of each transfer function to get the total open loop transfer function.

So when you have the magnitude at whatever frequency, then take log to base 10 of it and multiply it by 20 (ie 20*log[MAG])

So you must calculate your compensator transfer function.
Basso’s book is good on this….as it tells how to do it with the optocoupler in there.
"designing control loops for linear and switching power supplies" by Christophe Basso


I have the Basso Books on my shelf...so if you post schem of your compensator, ill tell if Basso has the transfer function for it......
 
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Hello,
I am using a LM5046 circuit. But there is nothing about the model. I will probably use the one you gave me, thank you for this ! With that I will be able to design the right compensator

Thank you again
 

Glad to be of assistance.
By The way, have you read this thread on PSFB?...

...is is one of the most often read threads on edaboard...
 

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