current mirror matching of DAC

[20tech11]

Hi All,

I have got a 5 bit DAC with 1,2,4,8,16 MOS transistors in the current sources and 32 transistors in the reference current source. I am confused how to go ahead with common centroid layout and placing dummy elements for better matching. Could anyone help me ?

 

[jgk2004]

well if you make your DAC in a straight line just put dummies on the ends, then layout if ABBA or BAAB patterns. If you are going to make it back to back, so more square like then just do row 1 ABBA row 2 BAAB with dummies on the ends top and bottom. So example of straight line with your bits label like you have them dummy5454545453535251525353545454545dummy. I think i got the count correct... All you want to do is spead out the bits so you don't see gradient effects. I do know its only 5 bits, but did you also make your current mirror transistors are large enough for your DAC resolution. There is a fabrication mismatch to worry about too!
Hope this helps
Jgk

 

[20tech11]

Thanks ..Yeah I made the transistor size big enough to match current and make the standard deviation less than 1%.. But about the transistor count I have got another transistor having 32 gates which acts as the reference current source. So I should accommodate it also in the layout. Also if we follow linear arrangement the length of the DAC will be long. Can't we follow any row column arrangement to achieve common centroid geometry in this case?

 

[jgk2004]

Just fold it over ontop of its self till you have the area that you can work with. A square is the best of course but sometimes you don't have that space...Also for the mirror transistor why does it have 32 gates? It should be exactly the same as the DAC transistors and also put it in the middle. Its just like a puzzle really just try to make everything symmetric around x or y or x&y axis. Its all about making so every transistor in DAC seeing the same thing, thus add Dummies around transistors that are on the edges, so they have neighbors like the inner ones!

Also what technology are you in? If your 130nm or below sometimes it not worth the wiring to make something completely common centroid and since your in small sizes things are so close together that they will not really see gradients!
Jgk

 

[20tech11]

yeah I am using 350 nm technology. The bias current flows through the big transistor(one having 32 gates and that develops the bias voltage for the other current sources ( having gates 16, 8, 4, 2,1) in the DAC.

 

[jgk2004]

OK so you should do common cent, but that mirroring transistors need to "match" your DAC transistors. How much current do you have per bit? or LSB? that same current should be in your mirror transistors and thus it should be the same size are your DAC transistors! A same of a same is alike!
Jgk

 

[20tech11]

LSB carries 15 uA.. and the bias curret is 32*15uA. So I have a total of 63 transistors in my circuit. I am little confused now.Waht is the difference between DAC transistors and current mirror transistors according to you?

 

[jgk2004]

You are injecting a current into a diode transistor. This diode transistor then making a voltage for that size transistor which is the EXACT voltage you need for the other transistors..(This is of course if the Vds is the same) If this transistor is the same as the DAC transistors then you have the EXACT current in all LSBs! Thus your mirror transistor is the same size as your LSB current sources to make matching perfect ( with same VDs that is!!!) Dont play the game of making this one little bigger to make the same current in the LSB sources! This is not a good idea!
Jgk

 

[erikl]

Re: aspect ratio of the array

I have a total of 63 transistors in my circuit.

If you don't have any priority for a certain array aspect ratio, a square ratio is the best you can do, as jgk noted above. Then the x & y values of the array depend on the aspect ratio of a single transistor: if the aspect ratio of the full transistor (i.e. incl. all connection widths) is, e.g., x:y=1:2 , you could choose an array size of x:y=15:7 ≈ 2:1 , yielding 13*5=65 transistors in the center (2 dummies in opposite corners) - and (13+5)*2+4=40 dummies around.

 

[20tech11]

This is the simplest DAC one can see and it is having its own problem. I am using this, to be familiar with Layout. Here the transistor size ratio are 32 , 16, 8, 4 , 2 ,1 and the transistor having the large size carries the bias current and ofcourse that determines the bias voltage. All other transistors from the 5 bit DAC cktry. As jgk pointed out the Vds should be the same for each transistor to expect the exact currents to flow through each transistors.

hi erkl thanks for your help..But could you please elaborate this , as I am new to this I couldn't get your calculations.

 

[erikl]

Re: aspect ratio of an array

... could you please elaborate this

Can't explain it much better, sorry! The idea is - if your single transistor has an overall aspect ratio of x:y=1:n , choose an array size (including dummies around) of x:y ≈ n:1 in order to get a nearly square array - which is the best you can do regarding symmetry and least systematic change vs. area.

So if your single transistor aspect ratio were x:y=1:2 like about this one:

... you would choose an array aspect ratio (including the surrounding dummy transistors) of x:y≈2:1. As you need 63 transistors you could choose an array of 13*5=65 ; with the surrounding 40 dummy transistors you have an array of (13+2)*(5+2)=15*7 , which then owns the desired aspect ratio of ≈2:1 , resulting in a nearly square array.

Hope I could have made it clear!

 

[20tech11]

Hi erkl,
Thank you very much..This is absolutely clear...Thanks for your help..