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Textbook: A.S Sedra and K.C. Smith, Microelectronic Circuits, 4th Ed., New York: Oxford University Press, 1998
Course Content
(1) Introduction to Electronics
Signals
Frequency Spectrum of Signals
Analog and Digital Signals
Basic Amplifiers
Gain in dB
Circuit Models for Amplifiers
Frequency Response of Amplifiers
(2) Operational Amplifers
Introduction to op-amps
Op-amp Terminals
Ideal Op-amp
Analysis of circuits using ideal op-amps
Inverting configuration
Non-inverting configuration
Examples of op-amp circuits
(3) Diodes
Ideal diode
Terminal characteristics of PN junction diodes
Physical operation of diodes
Analysis of diode circuits
load-line analysis
diode models
ideal
quasi ideal (constant voltage drop model)
battery plus resistance model
Small-signal diode model and its application
Zener diodes (operation in reverse breakdown region)
Rectifier Circuits
Limiting and Clamping Circuits
(4) Bipolar Junction Transistors (BJTs)
Physical structure and modes of operation
Operation of npn transistor in active mode
Operation of pnp transistor in active mode
Analysis of BJT circuits in DC
The transistor as an amplifier (small-signal amplification in active mode)
Small-signal equivalent circuit models
Graphical analysis
Biasing the BJT
Basic single-stage amplifier configurations
Transistor as a switch (saturation and cutoff mode)
Basic BJT logic inverter
(5) Field Effect Transistors (FETs)
Structure and physical operation of the nnhancement-type MOSFET
Current-voltage characteristic of the enhancement type MOSFET
Depletion-type MOSFET
MOSFET Circuits at DC
MOSFET as an amplifier (Saturation Mode)
Biasing in MOSFET amplifier circuits
Single-stage MOSFET amplifier circuits CMOS digital logic inverter
(6) MOS Digital Circuits
Overview of Digital Circuit Design
Design and performance analysis of CMOS logic inverter
CMOS logic gate circuits
a cmos logic inverter is a circuit made up of 2 transistors an NMOS and a PMOS the pmos and nmos gate and drain are tied. the source of pmos is connected to the Vdd(+ supply rail) and nmos source to Vss(- supply rail).the input to be inverted is given to the gates and output is taken from the drains. for analysis refer to "digital integrated circuits" by Rabaey and Chandrakasan
JUST TAKE TOW C-MOS TRANSISTORS, ONE N-MOS, AND THE OTHER ONE P-MOS. CONNECT THE GATES TO THE INVERSOR INPUT . CONECT THE P- MOS SOURCE TO THE OUTPUT AND DO THE SAME WITH THE N- MOS DRAIN . THE P- MOS DRAIN MUST BE CONNECTED TO POWER, AND THE N-MOS SOURCE MUST BE CONNECTED TO GROUND.
cmos inverter is made up of PMOS and NMOS by connecting their Drain together.
the basic function is to invert the input signal.when there is a high (1) voltage at the input NMOS conducts and it pull down the output to Vss or Gnd.if there is a low (0) voltage at the input PMOS conducts and it pullup the Output to Vdd.
thats how a cmos works.
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