vvmalode
Newbie level 1
Hi,
(1) How to determine number of bus cycle for read operation/write operation for AMBA AHB protocol. If I say bus cycle required for read /write is 4T states, then is it appropriate to say that for any amount of transfer on the bus the number of T states required is 4?
(2) Does clock frequency is related to bus frequency and how can we determine bus cycle from clock frequency or bus frequency for AMBA AHB protocol?
(3)If my clock frequency is say x then what should be my bus frequency for AMBA AHB protocol?
Please can someone explain me with example. I am really very confused regarding what values to consider for my arbiter module design for AMBA AHB protocol
(1) How to determine number of bus cycle for read operation/write operation for AMBA AHB protocol. If I say bus cycle required for read /write is 4T states, then is it appropriate to say that for any amount of transfer on the bus the number of T states required is 4?
(2) Does clock frequency is related to bus frequency and how can we determine bus cycle from clock frequency or bus frequency for AMBA AHB protocol?
(3)If my clock frequency is say x then what should be my bus frequency for AMBA AHB protocol?
Please can someone explain me with example. I am really very confused regarding what values to consider for my arbiter module design for AMBA AHB protocol
