clock data recovery (cdr) ... eye tracking

[sanjeeb]

Hi,
Has anybody here worked on clock data recovery circuits.
I was going through this paper
A 50-mW/ch 2.5-Gb/s/ch data recovery circuit for the SFI-5 interface with digital eye-tracking
by miki et al
h**p://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1278579&isnumber=28587
Can anybpdy help me in understanding how the author derives eqn 6.

thanks in advance

 

[sanjeeb]

guys..
i know its a lot of pain for nothing in return..
but at least can some body reply if they have understood this paper or not..

 

[dick_freebird]

I don't have access to the paper and am not much good
with equations.

However I have made a burst-mode clock recovery circuit
which (kind of by definition) must find and track the eye center.
Though in my case I elected to lock down the position
(timing) at some point during the preamble so that it would
not move around based on intra-packet data edge movement
and such.

The trick was to "clock the clock with the data" in a field of
phases, find the boundary between late and early around
the phase circle, and select the exact opposite from the phase
bank (thus maximally distant from data edge).

This all came from an idea that somebody told me was a
"textbook approach" but I never cracked that book, just took
the clue and ran with it.