circuit for reducing turn on voltage of bjt

[akbarza]

hi
in the below pic, with simulation, it is seen that the turn-on voltage of Q1 is decreased from approximately 640mv to below 100mv.
explain what is the reason for it. how does pnp bjt (Q2) effect on turn-on voltage of Q1?
thanks

 

[FvM]

Your circuit description is given to misunderstanding. The original description is this "a circuit configuration with smaller forward voltage characteristics than that of a bipolar junction transistor (BJT) connected as a diode". You don't see Q1 turn-on-voltage rather than the forward voltage of an active diode circuit.

Here's the original link https://wiki.analog.com/university/courses/alm1k/alm-lab-3

 

[D.A.(Tony)Stewart]

This experiment did not use a Voltage source for the NPN pullup resistor, thus no load current and not much voltage rise compared to the input voltage.

Observations for you to see

1. common base PNP is non-inverting
2. common emitter NPN is inverting
3. NPN-Vce will pull down Vb of PNP which pulls up Vb of NPN to saturate NPN Vce.
4. Vce will rise according to the difference between Vbe - Vbc = Vce (see plots of NPN)
5. If hFE2*hFE2 << Ic2/Ib1 it is saturating.
6. Rated saturation Vce(sat) in datasheets is given usually at Ic/Ib which is often <<10% hFE (DC current gain)
7. Thus Vcc for pullup on NPN becomes a comparator threshold to Vin. (if Rin/Rc<< hFE1*hFE2)

For PNP=Q1 , NPN = Q2,
Vbc1=Vcb2 So if NPN is not sinking current up thru 1k to Vcc, why is Vce= 20 mV? approx. in 3rd plot down for NPN.

With Vcc > 0V why does NPN pull down at Vin>=Vcc?

Interactive SIM with Vcc, and thumbwheel value changes. Beta = 50 constant (ideal)

http://tinyurl.com/ysao76hl

Under what condition will this circuit violate Absolute Maximum in most BJT datasheets?

 

[akbarza]

Your circuit description is given to misunderstanding. The original description is this "a circuit configuration with smaller forward voltage characteristics than that of a bipolar junction transistor (BJT) connected as a diode". You don't see Q1 turn-on-voltage rather than the forward voltage of an active diode circuit.

Here's the original link https://wiki.analog.com/university/courses/alm1k/alm-lab-3

i saw it before, but i do not know how it works.

 

[D.A.(Tony)Stewart]

If you can't understand my explanation ask a better question and say what you do understand

 

[FvM]

Q2 is acting as level shifter compensating Q1 Vbe threshold.

I don't understand b.t.w. the test setup in the original Analog LTspice simulation circuit that uses an unipolar triangle waveform, also copied in post #1. I would suggest a bipolar stimulus to demonstrate rectifier operation.

 

[D.A.(Tony)Stewart]

With no load or pullup to the NPN, All the current comes the Sig Gen. Thus is appears to clamp any positive input to gnd. Yet with any loaf R to gnd on the output, it would block negative output from the input emitter being reversed.

Not a really a useful circuit, but it is unusual.

With a pullup resistor the PNP transistor has no effect.