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Can't assign gclk pin to input clock in ISE 7.1

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fa1364

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Hi.
when I try to assign a gclk pin to my input clock in Assign Package Pins in ISE 7.1, it does not accept it.
( to be precise, pin77 in xc2s300e pq208 )
what is wrong?
any idea would be appreciable.
 

Re: input clock problem

just check the allow mode/ prohibit mode tab
 

Re: input clock problem

you should be check surely that pin 77 is global clock.
If yes, you may not need to set any constraint. It will automatic place gclk by ISE. But please remember, you must not use clock signal as combination circuit.
 

Re: input clock problem

Pahol is right!! In some FPGAs there are special pins which are reserved for the clock. The FPGA tool will always try to map to that pin.
Noiw if the pin 77 is a high fanout global signal pin and the tool is not assigning clock to it, then check if you are using the clock somewhere in the combi cirbuit.
 

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